gnu make - Generating a makefile target dependency from the filename in a stem -

hi have makefile creating each .o represented relative path directory , has dependency on .cpp file in local directory. understanding of problem can't use functions in rule definition rule:

%.o: %.cpp

results in prerequisite .cpp in same directory .o not cpp located. example:

../../tmp/myclass.o: ../../tmp/myclass.cpp <--- wrong, result of %.o: %.cpp

../../tmp/myclass.o: myclass.cpp <--- right, how do in automatic way?

lastly output, in yet directory, has dependency on .o's must have full relative path information beginning:

objs := $(addprefix ../../../tmp/xcode/${platform}/${configuration}/, $(addsuffix .o, $(basename ${srcs})))

${output}: ${objs} ; ${ar} $@ ${objs}

thanks!

i think kristi's solution work, here's way same thing:

# here's how it: objs := $(addprefix ../../../tmp/xcode/${platform}/${configuration}/, $(addsuffix .o, $(basename ${srcs})))  # here's cleaner way: basepath = ../../../tmp/xcode/$(platform)/$(configuration) objs := $(patsubst %.cc,$(basepath)/%.o,$(srcs))  # , here's rule: $(objs): $(basepath)/%.o: %.cc     whatever...